? semiconductor components industries, llc, 2015 january, 2015 ? rev. 8 1 publication order number: ntb5404n/d ntb5404n, ntp5404n, nvb5404n power mosfet 40 v, 167 a, single n?channel, d 2 pak & to?220 features ? low r ds(on) ? high current capability ? low gate charge ? aec?q101 qualified and ppap capable ? nvb5404n ? these devices are pb?free and are rohs compliant applications ? electronic brake systems ? electronic power steering ? bridge circuits maximum ratings (t j = 25 c unless otherwise stated) parameter symbol value units drain?to?source v oltage v dss 40 v gate?to?source v oltage v gs 20 v continuous drain current ? r jc steady state t c = 25 c i d 167 a t c = 100 c 118 power dissipation ? r jc steady state t c = 25 c p d 254 w continuous drain current ? r ja (note 1) steady state t a = 25 c i d 24 a t a = 100 c 17 power dissipation ? r ja (note 1) steady state t a = 25 c p d 5.4 w pulsed drain current t p = 10 s i dm 670 a operating junction and storage temperature t j , t stg ?55 to 175 c source current (body diode) pulsed i s 75 a single pulse drain?to source avalanche energy ? (v dd = 50 v, v gs = 10 v, i pk = 45 a, l = 1 mh, r g = 25 ) eas 1000 mj lead temperature for soldering purposes (1/8? from case for 10 s) t l 260 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. thermal resistance ratings parameter symbol max unit junction?to?case (drain) r jc 0.59 c/w junction?to?ambient (note 1) r ja 50 c/w 1. surface mounted on fr4 board using 1 sq in pad size, (cu area 1.127 sq in [2 oz] including traces). www. onsemi.com marking diagrams v (br)dss r ds(on) max i d max (note 1) 40 v 4.5 m @ 10 v 167 a ntb5404ng ayww g = pb?free device a = assembly location y = year ww = work week d 2 pak case 418b style 2 n?channel d s g 1 2 3 1 device package shipping ? ordering information NTP5404NRG t o?220 (pb?free) 50 units / rail ntb5404nt4g d 2 pak (pb?free) 800 / tape & ree l ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our t ape and reel packaging specification s brochure, brd8011/d. to?220ab case 221a style 5 1 2 3 4 NTP5404NRG ayww nvb5404nt4g d 2 pak (pb?free) 800 / tape & ree l
ntb5404n, ntp5404n, nvb5404n www. onsemi.com 2 electrical characteristics (t j = 25 c unless otherwise stated) parameter symbol test condition min typ max unit off characteristics drain?to?source breakdown voltage v (br)dss v gs = 0 v, i d = 250 a 40 v drain?to?source breakdown voltage temperature coefficient v (br)dss /t j 34 mv/ c zero gate voltage drain current i dss v gs = 0 v, v ds = 40 v t j = 25 c 1.0 a t j = 100 c 10 gate?to?source leakage current i gss v ds = 0 v, v gs = 30 v 100 na on characteristics (note 2) gate threshold voltage v gs(th) v gs = v ds , i d = 250 a 1.5 3.5 v gate threshold temperature coefficient v gs(th) /t j ?8.2 mv/ c drain?to?source on resistance r ds(on) v gs = 10 v, i d = 40 a 3.5 4.5 m v gs = 5.0 v, i d = 15 a 5.1 7.0 forward transconductance g fs v ds = 10 v, i d = 15 a 35 s charges and capacitances input capacitance c iss v gs = 0 v, f = 1.0 mhz, v ds = 32 v 4300 7000 pf output capacitance c oss 1075 1700 reverse transfer capacitance c rss 450 1000 total gate charge q g(tot) v gs = 10 v, v ds = 32 v, i d = 40 a 125 nc threshold gate charge q g(th) 5.5 gate?to?source charge q gs 12.5 gate?to?drain charge q gd 55 switching characteristics, v gs = 10 v (note 3) turn?on delay time t d(on) v gs = 10 v, v dd = 32 v, i d = 40 a, r g = 2.5 10 ns rise time t r 65 turn?off delay time t d(off) 85 fall time t f 85 switching characteristics, v gs = 5 v (note 3) turn?on delay time t d(on) v gs = 5 v, v dd = 20 v, i d = 20 a, r g = 2.5 25 ns rise time t r 175 turn?off delay time t d(off) 46 fall time t f 62 drain?source diode characteristics forward diode voltage v sd v gs = 0 v, i s = 20 a t j = 25 c 0.8 1.1 v t j = 125 c 0.65 reverse recovery time t rr v gs = 0 v, di sd /dt = 100 a/ s, i s = 20 a 75 ns charge time t a 38 discharge time t b 38 reverse recovery charge q rr 140 nc 2. pulse test: pulse width 300 s, duty cycle 2%. 3. switching characteristics are independent of operating junction temperatures.
ntb5404n, ntp5404n, nvb5404n www. onsemi.com 3 typical performance curves t j = 125 c 0 25 2 v ds , drain?to?source voltage (volts) i d, drain current (amps) 0 figure 1. on?region characteristics 3 25 0 figure 2. transfer characteristics v gs , gate?t o?source voltage (volts) figure 3. on?resistance vs. gate?to?source voltage r ds(on), drain?to?source resistance ( ) i d, drain current (amps) figure 4. on?resistance vs. drain current and gate voltage i d, drain current (amps) ?50 0 ?25 25 2 2.2 1 0.8 0.6 50 175 figure 5. on?resistance variation with temperature t j , junction temperature ( c) t j = 25 c t j = ?55 c 75 t j = 25 c i d = 40 a v gs = 10 v r ds(on), drain?to?source resistance (normalized) t j = 25 c r ds(on), drain?to?source resistance ( ) v gs = 10 v 10 figure 6. drain?to?source leakage current vs. voltage v ds , drain?to?source voltage (volts) 28 v gs = 0 v i dss , leakage (na) t j = 100 c 4 v 4.6 v v gs = 5 v v ds 10 v 16 36 3.8 v 4 4 0 200 v gs = 8 v to 10 v 50 125 100 5 10 0.008 v gs , gate?t o?source voltage (volts) 0.004 0.005 0.006 0.01 36 0.003 4 0.006 0.002 0.01 0.004 0.003 0.005 1000 4 610 12 20 14 0 30 40 1.8 20 50 4 6 v 7 v 0.007 860 50 175 75 i d = 40 a t j = 25 c 0.002 0.001 100 32 24 812 8 4.2 v 4.8 v 7 59 0.009 0.007 0.008 0.009 130 120 110 100 70 80 90 1.6 1.4 1.2 150 13 7 59 75 150 125 100 4.4 v 5 v 891 0 67 0 100 125 150 175 200 10000 100000 t j = 175 c
ntb5404n, ntp5404n, nvb5404n www. onsemi.com 4 typical performance curves figure 7. capacitance variation figure 8. gate?to?source and drain?to?source voltage vs. total charge 5 0 v sd , source?to?drain voltage (volts) figure 9. resistive switching time variation vs. gate resistance i s , source current (amps) v gs = 0 v t j = 25 c 25 figure 10. diode forward voltage vs. current 0.8 0.6 20 15 r g , gate resistance (ohms) 1 10 100 10 1 t, time (ns) v ds = 32 v i d = 40 a v gs = 10 v t r t d(on) 1000 t f t d(off) 10 30 v gs , gate-to-source voltage (volts) 0 6 0 q g , total gate charge (nc) 12 10 20 40 60 i d = 40 a t j = 25 c v gs q gs 140 q gd qt 4 2 100 80 0.4 0.7 0.5 v ds , drain-to-source voltage (volts) 18 0 36 24 12 6 v ds v ds = 0 v v gs = 0 v 15 20 10 10 35 12000 4000 2000 0 40 gate?to?source or drain?to?source voltage (volts) c, capacitance (pf) t j = 25 c c oss c iss c rss 8000 5 50 6000 v gs v ds 30 25 10000 c rss c iss 120 100 0.9 1 1.1 8 30 35 40 i d , drain current (amps) figure 11. maximum rated forward biased safe operating area 0.1 1 v ds , drain?to?source voltage (volts) 1000 r ds(on) limit thermal limit package limit 10 10 100 100 v gs = 10 v single pulse t c = 25 c 1 ms 100 s 10 ms dc 10 s 0.001 1 0.1 0.01
ntb5404n, ntp5404n, nvb5404n www. onsemi.com 5 r ja (t) = r(t) r ja d curves apply for power pulse train shown read time at t 1 t j(pk) ? t c = p (pk) r ja (t) p (pk) t 1 t 2 duty cycle, d = t 1 /t 2 figure 12. thermal response t, pulse time (sec) 100 50% duty cycle single pulse 10 1 0.1 0.001 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 r ja ( c/w) 20% 10% 5% 2% 1% 0.01
ntb5404n, ntp5404n, nvb5404n www. onsemi.com 6 package dimensions d 2 pak case 418b?04 issue k style 2: pin 1. gate 2. drain 3. source 4. drain *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 8.38 5.080 dimensions: millimeters pitch 2x 16.155 1.016 2x 10.49 3.504 seating plane s g d ?t? m 0.13 (0.005) t 23 1 4 3 pl k j h v e c a dim min max min max millimeters inches a 0.340 0.380 8.64 9.65 b 0.380 0.405 9.65 10.29 c 0.160 0.190 4.06 4.83 d 0.020 0.035 0.51 0.89 e 0.045 0.055 1.14 1.40 g 0.100 bsc 2.54 bsc h 0.080 0.110 2.03 2.79 j 0.018 0.025 0.46 0.64 k 0.090 0.110 2.29 2.79 s 0.575 0.625 14.60 15.88 v 0.045 0.055 1.14 1.40 ?b? m b w w notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. 418b?01 thru 418b?03 obsolete, new standard 418b?04. f 0.310 0.350 7.87 8.89 l 0.052 0.072 1.32 1.83 m 0.280 0.320 7.11 8.13 n 0.197 ref 5.00 ref p 0.079 ref 2.00 ref r 0.039 ref 0.99 ref m l f variable configuration zone view w?w
ntb5404n, ntp5404n, nvb5404n www. onsemi.com 7 package dimensions to?220 case 221a?09 issue ah style 5: pin 1. gate 2. drain 3. source 4. drain notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension z defines a zone where all body and lead irregularities are allowed. dim min max min max millimeters inches a 0.570 0.620 14.48 15.75 b 0.380 0.415 9.66 10.53 c 0.160 0.190 4.07 4.83 d 0.025 0.038 0.64 0.96 f 0.142 0.161 3.61 4.09 g 0.095 0.105 2.42 2.66 h 0.110 0.161 2.80 4.10 j 0.014 0.024 0.36 0.61 k 0.500 0.562 12.70 14.27 l 0.045 0.060 1.15 1.52 n 0.190 0.210 4.83 5.33 q 0.100 0.120 2.54 3.04 r 0.080 0.110 2.04 2.79 s 0.045 0.055 1.15 1.39 t 0.235 0.255 5.97 6.47 u 0.000 0.050 0.00 1.27 v 0.045 --- 1.15 --- z --- 0.080 --- 2.04 b q h z l v g n a k f 123 4 d seating plane ?t? c s t u r j on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other inte llectual property. a listing of scillc?s pr oduct/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typical s? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 ntb5404n/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative
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